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KMC11 Programmer's Manual
Company:
Digital Equipment Corporation
Part:
AA-5244B-TC
Date:
1977-12
Keywords:
Cited by:
EJ-17210-86,
Technical Documentation, January 1979
Copies
Address:
http://bitsavers.org/pdf/dec/unibus/KMC11_ProgMan.pdf
Site:
Al Kossow's Bitsavers
Format:
PDF
Size:
8751226 bytes (8.3 MiB)
Table of Contents
Chapter 1
Introduction
1.1
Purpose of Manual
1.2
KMC11 General Description
1.2.1
Controlling Peripherals over the UNIBUS
1.2.2
Controlling Peripherals Attached to the External Connector
1.3
Operating Environment
1.3.1
KMC11 Microprogramming Tools Minimum Hardware Requirements
1.3.2
KMC11 Software Tools
1.3.3
Prerequisite Software
1.4
Microprogram Development Considerations
1.5
Reference Documents
1.6
Notations
Chapter 2
KMC11 Microprocessor Architecture
2.1
CPU Structures
2.1.1
INBUS/OUTBUS and INBUS*/OUTBUS* Accessed Registers
2.1.1.1
Multiport RAM
2.1.1.2
NPR Control Register
2.1.1.3
Microprocessor Miscellaneous Control Register
2.1.1.4
External Connector
2.1.2
Components Accessed Through Direct Microinstruction Execution
2.1.2.1
Branch Register
2.1.2.2
Data Memory and Memory Address Register
2.1.2.3
Program Counter
2.1.2.4
Scratch Pad
2.1.3
Components Accessed from the UNIBUS
2.1.3.1
Control RAM
2.1.3.2
Maintenance Registers
2.1.4
Arithmetic/Logic Unit
2.2
Data Paths
2.2.1
Source Destination Data Transfer
2.2.2
Source Bus
2.2.3
Destination Bus
2.2.4
UNIBUS Interface
2.2.5
Microprogram Read/Write Bus
2.3
Register and Memory Formats
2.3.1
KMC11 CSR Format
2.3.2
NPR Address and Data and NPR Control Register Formats
2.3.3
µPMISC Register Format
2.3.4
Branch Register Format
Chapter 3
KMC11 Microinstruction Repertoire
3.1
Move Class Microinstructions
3.1.1
MAR Control Field
3.1.2
Move Class Microinstructions: Formats and Functions
3.1.2.1
Destination NODST
3.1.2.2
Destination BRG
3.1.2.3
Destination OUTBUS*
3.1.2.4
Destination BRG Right-Shifted
3.1.2.5
Destination OUTBUS
3.1.2.6
Destination Data Memory
3.1.2.7
Destination Scratch Pad
3.1.2.8
Destination Scratch Pad and BRG
3.2
Branch Class Microinstructions
3.2.1
Branch Address Field
3.2.2
Branch Class Microinstructions: Formats and Functions
3.2.2.1
Source Immediate
3.2.2.2
Source Data Memory
3.2.2.3
Source BRG
Chapter 4
KMC11 Macro Instructions
4.1
Microprocessor Register Definitions
4.1.1
NPR Control Register
4.2
Macro Instruction Syntax
4.2.1
Macro Arguments
4.2.2
Source Field Mnemonics
4.2.3
INBUS* and INBUS Register Symbolic Addresses
4.2.4
Arithmetic/Logic Unit (ALU) Functions
4.2.5
OUTBUS* and OUTBUS Register Symbolic Addresses
4.2.6
Scratch Pad Locations
4.2.7
Memory Address Register (MAR) Field Definitions
4.2.8
Data Memory Page Definitions
4.3
Microinstruction Syntax
4.4
Examples of KMC11 Instruction Macro Expansions
4.5
Reserved Symbols
4.6
Operating Instructions
Chapter 5
KMC11 Loader
5.1
Introduction
5.2
KMC11 Basic Loader Subroutine
5.3
KMC11 Loader Utility Program
5.3.1
Loader Assembly
5.3.2
Loader and Microcode Task Building
Chapter 6
KMC11 Debugging Aid
6.1
Command Categories
6.1.1
Examine and Modify CRAM
6.1.2
Execution Control Commands
6.1.2.1
Set Breakpoints
6.1.2.2
Clear Breakpoints
6.1.2.3
Begin Execution of Microprogram
6.1.2.4
Proceed from Breakpoint
6.1.2.5
Single Step
6.1.3
Examine and Modify CSRs
6.1.4
Examine Internal Registers and Data Memory
6.1.4.1
Examine BRG and Scratch Pad
6.1.4.2
Examine INBUS and INBUS*
6.1.4.3
Examine Data Memory
6.1.5
Utility Commands
6.1.5.1
Display a Breakpoint
6.1.5.2
Execute a Microinstruction
6.1.5.3
Load Data Memory
6.1.5.4
Load or Display the Memory Address Register (MAR)
6.1.5.5
Load Scratch Pad or BRG
6.1.5.6
Zero Data Memory
6.1.5.7
Calculate Offset
6.2
Breakpoint Handling
6.2.1
Reserved CRAM Requirements
6.2.2
Breakpoint Location Constraints
6.2.3
Proceed Counter
6.3
Example of a KMCDA Conversation
Chapter 7
Special Programming Characteristics
7.1
CSR Discipline
7.1.1
Initializing the CSRs
7.1.2
Microprogram Modification of CSRs
7.1.3
UNIBUS Modification of the CSRs
7.2
Multiport RAM Lockout
7.3
CSR Bit Settling Time
7.4
µPMISC and NPR Register Constraints
Appendix A
Special Programming Techniques
A.1
Preventing Loss of Data by Overwriting When the Microprogram or the PDP-11 Modifies the CSRs
A.2
Ensuring That CSR Bits Have Settled
