Appendix J

Lineprinter Registers

LP25, LP26 and LP27 Series Registers

The system printers described in chapter 16 can use the same controller. Following are the register drawings and bit definitions of the controller's two registers: the Control and Status Register and the Data Buffer Register.

Control and Status Register (LXCS) 777514

Figure J-1 Control and Status Register (LXCS) 777514
Bit Name
15

Error

Set whenever an error condition exists in the graphics lineprinter. Error conditions are power off, graphics lineprinter off-line, no paper, torn paper, band gate open, over-temperature alarm, or line-printer off-line.

Generates an interrupt if INTERRUPT ENABLE . 06 is also set. Cleared by correcting the error condition.

14 - 08

Not Used

07

Ready

Set when the graphics lineprinter is ready for the next character to be loaded into the data buffer register. Generates an interrupt if INTERRUPT ENABLE . 06 is also set.

06

Interrupt Enable

When set allows an interrupt to occur when either the ERROR . 15 or READY . 07 is also set.

Cleared by loading with a 0. Also cleared by INIT.

05 - 00

Not Used

Data Buffer Register (LXDB) 777516

Figure J-2 Data Buffer Register (LXDB) 777516
Bit Name
15 - 07

Not Used

06 - 00

Data

7-bit ASCII character buffer. Characters are transferred to the lineprinter by loading this buffer.

LXY12/LXY22 Series Registers

While the LXY12/LXY22 graphics lineprinters systems described in this appendix use different controllers depending on the model selected, each controller has two registers: the Control and Status Register and the Data Buffer Register. The following are the controller's register drawings and bit definitions.

Control and Status Register (LXCS) 777514

Figure J-3 Control and Status Register (LXCS) 777514
Bit Name
15

Error

Set whenever an error condition exists in the graphics lineprinter. Error conditions are power off, graphics lineprinter off-line, no paper, form paper or form thickness adjustment lever left up.

Generates an interrupt if INTERRUPT ENABLE <06> is also set. Cleared by correcting the error condition.

14 - 08

Not Used

07

Ready

Set when the graphics lineprinter is ready for the next character to be loaded into the data buffer register. Generates an interrupt if INTERRUPT ENABLE <06> is also set.

06

Interrupt Enable

When set allows an interrupt to occur when either the ERROR <15> or READY <07> is also set.

Cleared by loading with a 0. Also cleared by INIT.

05 - 00

Not Used

Data Buffer Register (LXDB) 777516

Figure J-4 Data Buffer Register (LXDB) 777516
Bit Name
15 - 08

Not Used

07

Paper Instruction (PI)

Used to advance the paper up to 15 lines when DATA BIT <04> is also set. Data bits <03-00> contain the number of lines to be advanced. When the PLXY-11 plot software is used with some operating systemss, the PI is disabled by installing jumper W5 on the controller logic board "A".

06 - 00

Data

Seven-bit ASCII character buffer. Characters are transferred to the lineprinter by loading this buffer.